In semiconductor manufacturing processes, design rules is about to enter a 100-nm era, and the manufacturing form is shifting from mass manufacturing of one type of product, as represented by DRAM (dynamic random access memory), to multiple types and small amount manufacturing such as SOC (silicon on chip) manufacturing. This shift is accompanied by an increased number of manufacturing steps, at each of which the yield rate must be essentially improved, with importance placed on inspections for defects caused by processes.
With higher integration of semiconductor devices and increasing miniaturization of patterns, inspection apparatuses are required to provide higher resolutions and higher throughput. In order to inspect a wafer for a 100-nm design rule to detect defects, a resolution of 100 nm or less is required. Since the amount of inspections increases due to an increased number of manufacturing steps resulting from higher integration of devices, a higher throughput is required. Also, as devices are formed of a larger number of layers, inspection apparatuses are required to provide a function of detecting defective contacts (electric defects) of via-holes which connect between wire patterns on layers.
Under the circumstances, a TDI detector having a detection rate of about 800M pixels/sec has been commercially available as an optical or electron beam detector. Further, an apparatus using a line sensor for capturing image data representative of a one-dimensional line image and an image projection type electron apparatus using an area sensor such as a CCD or CMOS image sensor for capturing image data representative of a two-dimensional image, have been provided.
An apparatus for detecting defects on a liquid crystal substrate has been provided in which a plurality of electro-optical barrels are positioned over the liquid crystal substrate. (See “NIKKEI MICRODEVICES” P. 28-P. 30, December, 2002.)